A20 Pro Won’t Break Apple’s Long-Held Tradition; No LPDDR6 RAM Support, But Faster Six-Channel Memory With Increased Bandwidth For AI Workloads
Key Points:
- The upcoming Apple A20 Pro SoC will not support the newer LPDDR6 memory standard but will instead use six-channel LPDDR5X RAM with a 96-bit bus width, enhancing memory bandwidth for AI workloads.
- This marks a shift from Apple's previous use of four-channel memory with a 64-bit bus width, addressing bottlenecks in on-device AI model processing caused by narrower bus widths.
- The A20 Pro's adoption of Wafer-Level Multi-Chip Module Packaging (WMCM) replaces the older inFO-PoP packaging, allowing for a larger memory footprint and improved heat dissipation by separating DRAM from the SoC die.
- These architectural changes enable the A20 Pro to sustain better performance during demanding AI tasks despite not adopting the latest LPDDR6 RAM standard.